Example candidateAndre A.
- Delivered 2 leading-edge fab shell & core programs
- Ran cleanroom raised access floor + subfab delivery
- OEM-facing tool hookup drawing coordination lead
Hire fab-fluent PMs with delivered semiconductor shell & core, ultra-pure utilities, and tool fit-up history — not commercial PMs claiming cleanroom-adjacency. SEMI, ultra-pure, hazardous gas & chemical, and CHIPS Act delivery discipline verified.
Example candidateA structured process for hires where a missed hazardous-gas coordination cycle or a botched tool fit-up delays the fab ramp — and the wafer starts behind it.
30-minute call. Align on seat (fabless / IDM / foundry / GC / OEM), project type (shell & core, cleanroom, tool fit-up), node, CHIPS-Act interface, and start date.
Within 2 weeks we introduce 3–5 fab-fluent PMs with delivered shell & core, cleanroom, or tool fit-up history. References from prior fab operators and OEMs included.
Every placement carries a replacement guarantee. If the hire fails within the warranty window, we run a no-fee replacement search.
Semiconductor construction is where the CHIPS Act calendar and the wafer ramp meet. Ultra-pure utilities discipline, tool fit-up sequencing, and hazardous gas / chemical fluency separate a fab PM who lands the ramp from one who becomes the reason the fab misses first silicon.
Every PM on the shortlist has delivered fab shell & core, cleanroom, or tool fit-up work — not commercial PMs claiming cleanroom-adjacency. Reference-verified from prior fab operators, IDMs, or fab GCs.
UPW, ultra-pure gas, hazardous chemical distribution, cleanroom classification, subfab utility fit-up. Referenced from prior process engineers and OEM tool installers.
Verified tool fit-up window discipline: OEM-facing coordination, hookup drawings, cleanroom protocol adherence, wafer-start-facing schedule. Not just “delivered on schedule” on a resume.
Every candidate is credential-verified, fab-referenced, and matched to your program. Anonymized examples below reflect real placement profiles.
Example candidate
Example candidate
Example candidate“Semiconductor PM” means very different things across shell & core, cleanroom, subfab, and tool fit-up. Below are the specializations we recruit for:
We’ll help you scope the role on the call — seat, project type, cleanroom class, and tool fit-up cadence.
Fab PM hires live and die on ultra-pure utility discipline, tool fit-up sequencing, and OEM-facing coordination. Below is what every candidate has documented before you meet them:
Reference-verified from prior fab operators, IDMs, foundries, or fab GCs. Shell & core, cleanroom, or tool fit-up delivery under fab standards.
UPW, ultra-pure gas, bulk chemical distribution, subfab utility fit-up. Referenced from prior process engineers and OEM tool installers.
NFPA 55, SEMI S2 / S8 / S22 compliance, hazardous production materials interface, and abatement fit-up experience.
Reference-verified tool hookup drawing coordination, cleanroom protocol adherence, and wafer-start-facing schedule composure.
PMP, DBIA where applicable, OSHA 30/500, and sector-specific credentials as required. Not just PMP alone.
Semiconductor PM, Senior, Project Executive, and Director-level comp bands aligned before finalist interviews.
Time to shortlist is typically 2 weeks from scoping call. Total time to placement (shortlist through offer acceptance) is typically 3–4 weeks.
Pricing depends on engagement model. Per-role recruiting is a defined fee. Embedded is a monthly retainer. Executive search (Fab PE, Director-level) is a retained fee, typically 30–35% of first-year cash comp.
Yes. Both seats are core coverage — fab operator PMs (foundry / IDM employee), fab GC-side PMs (delivery-firm employee), and owner’s rep firm PMs. Seat-fit is scoped on the intake call.
Yes. CHIPS-grant program PMs with grant-compliance and CHIPS-milestone delivery fluency are core coverage. Referenced from prior grant-recipient programs where reachable.
Yes. We reference-verify with prior OEM tool installers, process engineers, and fab operators on hookup drawing coordination and wafer-start-facing schedule discipline.
Yes. Every Semiconductor PM placement carries a replacement guarantee. Guarantee terms are confirmed in writing at engagement start.
Yes. Program builds (PE + Sr PMs + PMs + Sr Supers + MEP / Tool Fit-Up leads) route through embedded recruiting or RPO. Common for GCs standing up a semiconductor vertical or CHIPS-Act program.
Generalist tech recruiters treat “cleanroom experience” as interchangeable. iRecruit.co Semiconductor PM recruiters verify fab type, ultra-pure fluency, and OEM tool interface — every candidate is matched to your fab context.
30-minute scoping conversation. We’ll review the fab PM role you need, seat, project type, cleanroom class, and tool fit-up cadence — then recommend the right hire path and start sourcing.